HBM2E PHY IP operates at 3.2 Gbps

Synopsys announced it has delivered silicon-proven HBM2E PHY IP operating at 3.2 gigabits per second (Gbps), addressing high throughput requirements of advanced graphics, high-performance computing and networking SoCs. Verified on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology, Synopsys’ DesignWare HBM2E PHY IP offers a micro-bump array that adheres to the JEDEC HBM2E SDRAM standard for the shortest […] The post HBM2E PHY IP operates at 3.2 Gbps appeared first on E...